quick start guide for demonstration circuit dc570 high speed delta sigma adc 1 ltc2440 description the ltc2440 is a high-speed 24-bit ? adc with 5ppm inl and 5 v offset. it uses a proprietary delta-sigma architecture enabling variable speed and resolution with no latency. ten speed/resolution combinations (6.9hz/200nv rms to 3.5 khz/25 v rms ) are programmed through a simple serial interface. alternatively, by pulling the serial input pin high or low, a fast (880hz/2 v rms ) or ultra low noise (6.9hz, 200nv rms , 50/60hz rejection) speed/resolution combination can be easily selected. the accuracy (offset, full-scale, linearity, drift) and power dissipation are independent of the speed selected. since there is no latency, a speed/resolution change may be made between conversions with no degradation in per- formance. DC570A is a member of linear technology?s quickeval? family of demonstration boards. it is designed to allow easy evaluation of the ltc2440 and may be connected directly to the target application?s analog signals while using the dc590 usb serial controller board and sup- plied software to measure performance. the exposed ground planes allow proper grounding to prototype cir- cuitry. after evaluating with ltc?s software, the digital signals can be connected to the application?s processor / controller for development of the serial interface. design files for this circuit board are available. call the ltc factory.
quick start guide for demonstration circuit dc570 high speed delta sigma adc 2 quick start procedure connect dc570 to a dc590 usb serial controller using the supplied 14 conductor ribbon cable. connect dc590 to host pc with a standard usb a/b cable. run the evaluation software supplied with dc590 or downloaded from www.linear.com . the correct program will be loaded automatically. click the collect button to start reading the input voltage. click the slider at the bottom of the strip-chart display to change the oversample ratio (osr), which will in turn change the data output rate. tools are available for logging data, changing reference voltage, changing the number of points in the strip chart and histogram, and changing the number of points aver- aged for the dvm display.
quick start guide for demonstration circuit dc570 high speed delta sigma adc 3 hardware set-up jumpers jp1 ? select the source for ref+, either external or 5.00 volts from the onboard lt1236 reference (de- fault.) jp2 ? select the source for ref-, either external or ground (0 volts, default.) jp3 ? trigger mode, either normal (default) or exter- nally triggered. jp4 ? trigger input signal. pin 1 is a 5 volt logic sig- nal, pin 2 is ground. when triggered mode is selected on jp3, a rising edge starts a new conversion. connection to dc590 serial controller j2 is the power and digital interface connector. con- nect to dc590 serial controller with supplied 14 con- ductor ribbon cable. analog connections analog signal connections are made via the row of turret posts along the edge of the board. also, if you are connecting the board to an existing circuit, the ex- posed ground planes along the edges of the board may be used to form a solid connection between grounds. gnd ? ground turrets are connected directly to the internal ground planes. vcc ? this is the supply for the adc. do not draw any power from this point. external power may be applied to this point after disabling the switching supply on dc590. if the dc590 serial controller is being used, the voltage must be regulated 5 volts only, as the iso- lation circuitry will also be powered from this supply. ref+, ref- - these turrets are connected to the ltc2440 ref+ and ref- pins. if the onboard reference is being used, the reference voltage may be monitored from this point. an external reference may be con- nected to these terminals if jp1 and jp2 are config- ured for external reference. note: the ref+ and ref- terminals are decoupled to ground with 0.1f and 10 f capacitors in parallel. thus any source connected to these terminals must be able to drive a capacitive load and have very low im- pedance at dc. examples are series references that require an output capacitor and c-load stable op amps such as the lt1219 and lt1368. in+, in- - these are the differential inputs to the ltc2440. these terminals have a filter consisting of a 1 f capacitor and 100 ohm resistor to attenuate sam- pling glitches from the ltc2440 input network. these terminals should be driven by a low impedance source or op amp that is compensated to drive capacitive loads.
quick start guide for demonstration circuit dc570 high speed delta sigma adc 4 experiments input noise solder a short wire from the in- turret post to the in+ turret post. set the demo software to osr32768 (6.8 samples per second.) noise should be approximately 0.04ppm of vref (200nv.) next, select different over- sample ratios. measured noise for each oversample ratio should be close to values given in the ltc2440 data sheet. common mode rejection tie the two inputs (still connected together from pre- vious experiment) to ground through a short wire and note the indicated voltage. tie the inputs to ref+; the difference should be less than 5 v due to the 120 db cmrr of the ltc2440. resolving milliamps with milliohm shunts one application that can benefit greatly from the ltc2440?s input resolution is current measurement. it is advantageous to use a very low resistance shunt to minimize the voltage drop. to demonstrate this, make a simple current shunt by soldering a 1 inch length of 24 gage copper wire from the in+ turret to the in- tur- ret. this is a resistance of approximately 2.4 milli- ohms. connect the in- turret to the gnd turret through a short wire. start the demonstration software and note the initial voltage, which should be close to zero. next, connect in+ to ref+ through a 5k resistor, which will allow approximately 1 ma to flow through the shunt. the indicated voltage should increase by approximately 2.4 v (the actual increase will depend on the tolerance of the wire material, diameter, and length.) since the common mode range of the inputs extends from ground to vcc, the current shunt can also be used at the ?high side.? to demonstrate this, tie the in+ turret to vcc and connect the resistor from in- to ground. thus the supply current of a circuit can be monitored with minimal impact on supply voltage and without breaking any ground connections. bipolar symmetry to demonstrate the symmetry of the adcs transfer function, connect a stable, low noise, floating voltage source (with a voltage less than vref/2) from in+ to in- and note the indicated voltage. reverse the polar- ity; the indicated voltage should be within 75 v of the first reading multiplied by ?1, and will typically be much closer. one convenient voltage source is a single alkaline bat- tery. while a battery is fairly low noise, it is sensitive to temperature drift and will slowly discharge due to the ltc2440 input current. it is best to use a large (d-size) battery that is insulated from air currents. a better source is a battery powered series reference that can drive the 1 f input capacitor such as the lt1790. this part is available with output voltages of 1.25v, 2.048v, 2.5v, 3v, 3.3v, 4.096v and 5v. input normal mode rejection the ltc2440?s sinc4 digital filter is trimmed to strongly reject both 50 and 60 hz line noise when op- erated with the internal conversion clock and over- sample ratio 32768 (6.8 samples per second.) to measure input normal mode rejection, connect in- to a 2.5 volt source such as an lt1790-2.5 reference or a power supply. apply a 10 hz, 2v peak-to-peak sine wave to in+ through a 1uf capacitor. note that this will form a 2:1 divider with the 1uf load capacitor on the board. a larger capacitor may be used to reduce this attenuation.
quick start guide for demonstration circuit dc570 high speed delta sigma adc 5 select osr32768 (6.8 samples per second) in the demo software and start taking data. the input noise will be quite large, and the graph of output vs. time should show large variations. next, slowly increase the frequency to 55 hz. the noise should be almost undetectable in the graph. note that the indicated noise in ppm may still be above that of the datasheet specification because the inputs are not connected to a dc source. change the osr to 16384 (13.75 samples per sec- ond;) the noise will increase substantially, as the first notch at this osr is at 110 hz. increase the signal generator frequency to 110 hz, the noise will drop again. buffering the inputs the input current of the ltc2440 may be as much as 63 a (depending on input and reference voltages; see applications information in the ltc2440 data sheet for details.) if this produces unacceptable errors due to source impedance, a buffer may be necessary. most op-amps will not drive a 1uf capacitor directly. the following schematic shows how to compensate almost any amplifier to drive the capacitors on the dc570 board while maintaining dc accuracy. the ltc2050hv (or the dual ltc2051hv) is a good gen- eral purpose, auto-zero amplifier for use as a buffer in dc applications. - + 1 f (on dc570) 10 ? 5k ? 0.01 f input to ltc2440
5 5 4 4 3 3 2 2 1 1 d d c c b b a a 2. install shunt on jp1-jp3 pin 1 and 2. 1. all resistors are in ohms, 0603. all capacitors are in microfarads, 0603. notes: unless otherwise specified gnd ext ext 5v triggered normal a DC570A-2 * ltc2440cgn tuesday, january 07, 2003 11 high speed delta sigma adc kim t. mark t. a schematic size date: dwg no. rev sheet of title: contract no. approvals drawn: checked: approved: engineer: designer: technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidentia l-for customer use only vin sck mosi fo vcc in- ref+ vout cs miso in+ ref- cp vcc vcc vcc u1 ltc2440cgn 9 10 11 13 12 16 1 2 3 4 15 5 14 6 7 8 gnd ext cs sck sd0 gnd gnd vcc ref+ ref- busy in+ fo in- sdi gnd c6 4.7uf,6.3v 0805 e3 ref+ e5 in+ c10 0.1uf c7 0.1uf u2 lt1236acs8-5 1 2 3 4 5 6 7 8 nc vin nc gnd trim vout nc nc jp4 opt 1 2 jp1 ref+ 1 3 2 r9 0 e6 in- c9 330pf r7 0 c8 330pf c11 0.1uf jp2 ref- 1 3 2 r5 4.99k 1% j1 fo sma 1 2 3 4 5 c2 4.7uf,6.3v 0805 r2 100 c3 0.1uf e1 gnd c5 0.01uf u5 24lc025 5 8 1 2 3 4 7 6 sda vcc a0 a1 a2 vss wp scl jp3 trig mode 1 3 2 r8 100 r1 49.9,1% u3 nc7sz157p6x 3 5 4 1 2 6 i0 vcc z i1 gnd s c1 0.1uf j2 hd2x7-079-molex 8 5 12 11 10 9 6 7 3 4 2 1 13 14 8 5 12 11 10 9 6 7 3 4 2 1 13 14 e2 vcc u4 nl17sz74us 1 6 7 2 3 5 8 4 cp clr pr d q q vcc gnd r3 0 r10 100 e7 gnd r11 4.99k 1% r4 10k r6 opt e4 ref- c4 10uf,6.3v 0805
linear technology corporation ltc2440cgn high speed delta sigma adc eng: mark thoren (25-30) bill of materials DC570A-2 qty-175 11/9/2004 9:32 am item qty referenc e part description manufacture / part # number of boards = 1 5 c1,c3,c7,c10,c11 cap., x7r 0.1uf 16v,0603 avx, 0603yc104mat1a 2 2 c2,c6 cap., x5r 4.7uf 6.3v, 20%, 0805 taiyo yuden, jmk212bj475mgt 3 1 c4 cap., x5r, 10uf 6.3v, 20%, 0805 tdk, c2012x5r0j106m 4 1 c5 cap., x7r 0.01uf 16v 10%,0603 avx, 0603yc103kat1a 5 2 c8,c9 cap., npo 330pf 50v 10%,0603 avx, 06035a331kat1a 6 7 e1,e2,e3,e4,e5,e6,e7 testpoint, turret, .064" mill-max, 2308-2 7 3 jp1,jp2,jp3 jmp, 3pin 1 row .079cc comm-con, 2802s-03-g1 8 3 shunts for jp1-jp3 shunt, .079" center comm-con ccij2mm-138g 9 0 jp4 jmp, hd1x2-07 9 opt 10 0 j1 conn, 5 pin gold, straight connex, 13213 4 11 1 j2 header, 2x7pin, 0.079cc molex, 87331-1420 12 1 r1 res., chip 49.9 1/16w 1%,0603 aac, cr16-49r9fm 13 3 r2,r8,r10 res., chip 100 1/16w 5%,0603 aac, cr16-101jm 14 3 r3,r7,r9 res., chip 0 1/16w 5%,0603 aac, cj06-000m 15 1 r4 res., chip 10k 1/16w 5%,0603 aac, cr16-103jm 16 2 r5,r11 res., chip 4.99k 1/16w 1%,0603 aac, cr16-4991fm 17 0 r6 res, 0603 opt 18 1 u1 i.c., ltc2440cgn, ssop16gn linear tech., ltc2440cgn 19 1 u2 i.c., lt1236acs8-5, so8 linear tech., lt1236acs8-5 20 1 u3 i.c., nc7sz157p6x, sc70-6p fairchild semi., nc7sz157p6x 21 1 u4 i.c., nl17sz74us, us8 on semi., nl17sz74us 22 1 u5 i.c., 24lc025, tssop8 microchip, 24lc025 notes: unless otherwise specified 1. all resistors are in ohms. 2. install shunts on jp1-jp3 pin 1 and 2. page 1 - of - 1
|
